New recruits often lack the skills to “hit the ground running.” According to SIA member companies, many students graduating from colleges and universities with excellent general engineering or computer science skillsets often lack industry specific skills and the broader set of “soft skills” required to work effectively as part of a team in an industry setting.

University Program

Provide your students real-world chip design experience that includes tapeout and silicon fabrication

chipIgnite for Universities

Undergraduate and Graduate Courses

Provide tapeout and fabrication
of student projects.

Get silicon back in the following
session so students can bring-up
and test their projects.

Capstone projects

Support undergraduate capstone projects
with silicon fabrication.

Students can demonstrate their projects
with working implementations.

Graduate research

Support graduate research and publications
demonstrating results from fabricated designs.

University-optimized shuttles

We have chipIgnite shuttles in June and November that are optimized for the University schedule.

These shuttle are scheduled to return silicon back to students in the next session (October and March).

Aggregate multiple projects into a single tile

Courses with smaller digital or analog student projects can be aggregated into a single project slot making fabrication very cost effective for larger class sizes.

No legal agreements

Access to the foundry technology, chip reference design, EDA tools and design flow are completely open-source.

There are no NDA or other legal agreements required. All content can be downloaded from git repos.

There are no export control restrictions, making it easy to provide access for all your domestic and international students.

Freely collaborate

No NDAs means you can freely share design files across teams and organizations, including GDS final layout files.

Collaborate with universities freely including sharing projects, course content, joint design or support design competitions.

Rapid Design

Leveraging reference designs and automated flows enables students to complete a design in a full chip within the time constraints of a single session.

Single session courses can enable students to complete a focused design goal by leveraging an existing template for a full chip.

We provide everything you need

A full open-source reference design

...with easy access from our git repo.

Open-source designs enable you to focus the time and effort for design around specific goals.

Reference designs allow students to complete their own full design in a time-limited course session.

Easy access to foundry technology

The 130nm technology PDK is fully open including standard cell and IO libraries, Spice and timing models and verification decks.

Community open-source IP is available including SRAM macros.

EDA tools and design flow

Open-source EDA tools are available for implementing digital and analog designs.

Commercial tools can also be used for implementing the user project areas that will be hosted on the reference chip design.

Silicon Bring-up and Test

You get packaged parts and fully assembled evaluation boards with your students’ projects.